Tenstorrent is building next-generation AI hardware, combining innovations in software, compilers, and RISC-V CPU design. Our team is passionate about performance, efficiency, and solving complex problems in silicon and systems. We are looking for a Physical Design Engineer, LEC & Implementation to ensure the functional accuracy and consistency of our high-performance AI chips, driving logic equivalence checking (LEC), executing low-power static checks, and working closely with design and implementation teams to debug and optimize complex backend flows. You will own logical equivalence checking and support physical implementation tasks including synthesis, PnR, and timing closure, ensuring design correctness and tapeout readiness.

This role is hybrid, based out of Austin, TX, Santa Clara, CA, or Fort Collins, CO.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• A detail-oriented engineer with strong experience in physical design and logical equivalence checking.
• Proficient at navigating complex SoC/ASIC design flows on taped out designs, and skilled at problem-solving across synthesis, PnR, and timing closure.
• Comfortable working across RTL, synthesis, PnR, and sign-off workflows.
• Skilled at debugging complex implementation or verification mismatches and providing actionable insights.

What We Need

• 5+ years in physical design with hands-on ownership of LEC and low-power static checks (VCLP/CLP Verify).
• Expert with LEC tools and flows, power-aware static verification, and debugging equivalence failures.
• Experience in synthesis, PnR, timing closure, and logical ECO flows for large-scale SoC or ASIC designs.
• Advanced scripting skills (Python, Tcl, Perl) to automate checks and processes.

What You Will Learn

• Tenstorrent’s rigorous methodologies for logic equivalence and low-power verification on cutting-edge silicon.
• How high-performance SoC backend flows are executed and optimized for functional and power goals.
• Best practices for documenting, automating, and scaling LEC and VCLP flows for next-generation AI accelerators.
• Cross-functional strategies for efficient debug, handoff, and continuous methodology improvement across world-class silicon teams.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.