Verification Engineer – AI SoC Development
- 755 Intel Microelectronics (M) Sdn. Bhd.
- US, California, Folsom
- 4mo ago
- Full-Time
- On-site
About the Role Intel's AI SoC organization is building next-generation ASICs for AI applications across edge and cloud. As a Verification Engineer, you will be part of a dynamic team ensuring functional correctness of complex digital designs. If you are passionate about verification and eager to learn, this role offers abundant growth opportunities.
Position Overview You will perform functional logic verification of integrated SoCs to ensure designs meet specifications. This includes defining and developing scalable and reusable block, subsystem, and SoC verification plans, test benches, and verification environments to meet required coverage levels and confirm to microarchitecture specifications.
You'll execute verification plans and define and run emulation and system simulation models to verify designs, analyze power and performance, and uncover bugs. Working in the presilicon environment, you'll replicate, root cause, and debug issues while finding and implementing corrective measures to resolve failing tests.
Collaboration is essential as you'll work with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. You'll document test plans and drive technical reviews with design and architecture teams while incorporating security activities within test plans to ensure security coverage.
Additionally, you'll maintain and improve existing functional verification infrastructure and methodology, absorb learning from postsilicon validation quality, update test plans for missing coverages, and proliferate improvements to future products.
Key Responsibilities • Perform digital ASIC verification at block and system level
• Develop and execute test plans; write and review test sequences
• Build SystemVerilog testbench infrastructure (UVM and non-UVM) for functional verification
• Run regressions, analyze results, and drive code and functional coverage closure
• Collaborate with design teams to debug and resolve issues
• Contribute to pre-silicon verification, chip bring-up, and post-silicon validation
• Be a hands-on self-starter who can execute verification steps for complex designs
The must possess the following professional traits:
• Ability to work in a fast-paced environment and adapt to changing requirements
• Strong problem-solving skills and eagerness to learn
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
• 4+ years of experience in ASIC/SoC verification
Preferred Qualifications
• Knowledge of SystemVerilog and UVM methodology
• Understanding of digital design fundamentals and verification concepts
• Familiarity with EDA tools: simulators (VCS, Questa), coverage tools, and waveform debug
• Basic scripting skills (Python, Perl, TCL) for automation
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
Annual Salary Range for jobs which could be performed in the US: $139,710.00-197,230.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.