SSG Memory Controller Design Engineering Intern (Summer 2026)

  • Cadence
  • Austin
  • 1mo ago
  • Full-Time
  • On-site

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This is an opportunity to join a development team designing state-of-the-art DDR memory controllers to be used in a wide range of applications including Datacenter, Edge computing, Automotive, and AI.  Cadence is a leading provider of IP solutions for the biggest names in the technology industry. 

As a member of our team you will assist with:

  • Design RTL in a highly configurable and automated environment
  • Work in small project teams
  • Utilize Cadence’s Design Automation flow and IP development tools.

Experience & Qualifications

  • Currently pursuing BS or MS in EE, ECE, CE, or equivalent
  • Background in RTL design including Verilog, synthesis, lint, formal.
  • Strong written and verbal communication skills
  • Scripting language experience a plus
  • Currently pursuing a Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
  • Cumulative 3.0/4.0 GPA or higher

We’re doing work that matters. Help us solve what others can’t.